Signal processing units such as central processing units (CPUs) vary in structure depending on the intended use. A signal processing unit generally has a main memory for storing data or program and other memory devices such as a register and a cache memory. A register has a function of temporarily holding a data signal for carrying out arithmetic processing, holding a program execution state, or the like. Meanwhile, a cache memory, which is located between an arithmetic device and a main memory, is provided to reduce access to the main memory and speed up the arithmetic processing.
In a memory device in a signal processing unit, such as a register or a cache memory, input of a data signal needs to be performed at higher speed than in a main memory. For this reason, in general, a flip-flop, a static random access memory (SRAM) or the like is used as a register or a cache memory. In other words, such a register, a cache memory, or the like is a volatile memory device which loses a data signal after the supply of the supply voltage is stopped.
In order to achieve low power consumption, a method in which the supply of the supply voltage to a signal processing unit is temporarily stopped while input/output of data signal is not conducted has been suggested (see Patent Document 1, for example). In the method in Patent Document 1, a nonvolatile memory device is located in the periphery of a volatile memory device, and the data is temporarily stored in the nonvolatile memory device.